Download zamiaCAD 0.11.2 software

[Mirror1 download link] - file hosted by sourceforge.net

Modular platform for HW design

Whats new in version 0.11.2:
• Switched Java requirement to 1.7
• [UI] Waveform made more ISim-style and selection improved
• [UI] Verilog editor enabled. It shows parsing errors but not elaborated.
• [UI] Xilinx PRJ import. Adds appropirate files into project and maps to lib via BuildPath
• [CORE+UI] dump Report to XML upon request from XML
• [CORE] Bitvecotr ROL/ROR operators interpretable
• [CORE] Succ/Pred VHDL attributes elaborated and simulated
• [CORE] For-looping enums. Amount of interpreted code was reduced in for-loops.
• [CORE] Postponed processes (simulated).
• [SIM] fixed condition check in WAIT ON CLK UNTIL CLK='1'
• [SIM] support bitvector multidriver resolution. Amount of drivers reduced by 36%.
• fixing failures in error reporting
• errors stuck (due to parser unspecified error location)
• trying to prevent ResourceException: The resource tree is locked for modifications